In recently years, manufacturing procedure for industrial products has become more and more complicated. In order to meet high expectation in yield rate, prompt identification of root causes that make defects occur is required. The industry has developed various ways to detect manufacture defects. As may be seen in the industry, process control, statistical analysis and all kinds of test procedures are used to establish a solid base to improve the yield rate in the manufacture process. However, identification of root causes is still difficult, partly due to the fact that the root causes are brought up by a plurality of factors and the factors interact in a nonlinear manner.
With the huge amount of semiconductor engineering data stored in database and the variety of analytical charts and reports in production and development, the CIM, MES and EDA systems help the semiconductor industry to analyze the collected information to allocate root causes. As the semiconductor manufacture procedure is sophisticated and data collected from the procedure are in a large quantity, several statistical methods, such as the K-W test, the covariance analysis, the regression analysis etc. are used to conduct preliminary analysis of the raw data. The result, however, could add more than useful indexes to the existing data, which would not be easily understood by users. Besides, false alarms are frequently generated so that users spend unnecessary time to verify the alarms.
V. Raghavan applied decision tree to discover the root cause of yield loss in integrated circuits. See V. Raghavan, “Application of decision tree for integrated circuit yield improvement”, IEEE/SEMI Advanced Semiconductor Manufacturing Conference & Workshop, 2002.
M. Gardner and J. Bieker combined self-organizing neural networks and rule induction to identify the critical poor yield factors from normally collected wafer manufacturing data. See M. Gardner and J. Bieker, “Data mining solves tough semiconductor manufacturing problems”, ACM KDD Conference, Boston, USA, 2000.
F. Mieno et al. applied a regression tree analysis to failure analysis in LSI manufacturing. See F. Mieno et al., “Yield improvement using data mining system”, IEEE Semiconductor Manufacturing Conference, 1999.